Tapan Shah School of Technology and Computer Science Tata Institute of Fundamental Research Homi Bhabha Road
Monday, 15 November 2010 (All day)
In ``multiGigabit systems having digital signal processing (DSP) based transceiver architectures, the analog-to-digital converter (ADC) is a critical component due to the cost and power requirements of high precision ADC. Thus, we may be forced to reduce the precision to 1-3 bits. We study the performance degradation of a conventional OFDM receiver at low precision and investigate an alternate receiver structure, which we call analog OFDM receiver (AOR), where we incorporate some analog processing before sampling. In an ideal implementation, the AOR yields near full precision performance. We also discuss some challenges in implementing such a receiver.